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[ELanguage] xilinx_primitives

Description: verilog code for alu
Platform: | Size: 47104 | Author: manish kumar | Hits:

[VHDL-FPGA-Verilog] alu_32_bit

Description: 一个Verilog语言写的３２位ＡＬＵ的源码。-A language written in Verilog source code for a 32-bit ALU.
Platform: | Size: 2048 | Author: sunny | Hits:

[VHDL-FPGA-Verilog] 4

Description: simple code based on verilog shifter , cla ,clg , ALU , PC
Platform: | Size: 3072 | Author: Tera | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 算术逻辑部件的verilog代码，它能够实现半加器、全加器、比较、按位与、按位或、按位异或、加一、减一的操作-Arithmetic logic unit of the verilog code, it can achieve half adder, full adder, compare, bitwise and, bitwise or, bitwise xor, plus one, minus one operation
Platform: | Size: 169984 | Author: 李鹏飞 | Hits:

[VHDL-FPGA-Verilog] 74181ALU

Description: alu功能。实现计算机的数字运算。运用的是74181芯片-alu function. The number of computer-based operations. Use the 74181 chip. .
Platform: | Size: 1024 | Author: 刘墉 | Hits:

[VHDL-FPGA-Verilog] alu32bit

Description: verilog hdl alu module it is 32bit alu and 1bit alu
Platform: | Size: 368640 | Author: park | Hits:

[VHDL-FPGA-Verilog] ALU

Description: verilog硬件仿真，实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations, shift operations. RTL-level simulation level.
Platform: | Size: 3072 | Author: | Hits:

[VHDL-FPGA-Verilog] pipelALU

Description: pipeline ALU verilog code
Platform: | Size: 2048 | Author: holyhi | Hits:

[VHDL-FPGA-Verilog] verilog-example

Description: 4位并行乘法器 4位超前加法器 ALU 计数器 滤波器 全加器 序列检测器 移位器-failed to translate
Platform: | Size: 6144 | Author: 向死而生 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 用verilog写的alu的简单的功能，包括移位，加减法-With the alu verilog write simple functions, including shift, addition and subtraction, etc.
Platform: | Size: 40960 | Author: alex | Hits:

[Software Engineering] ALU

Description: 计算机ALU的verilog设计，能够实现加减与或运算-Computer ALU verilog design can add and subtract with or computing
Platform: | Size: 2048 | Author: hello | Hits:

[VHDL-FPGA-Verilog] ALU

Description: Verilog编写的ALU，可实现数学、移位、逻辑运算-ALU Verilog prepared, enabling mathematics, shift, logical operations
Platform: | Size: 1024 | Author: | Hits:

[Other] ALU

Description: Verilog中的ALU设计，具备ALU的功能，十分详细。-The ALU Verilog design, with ALU functions, very detailed.
Platform: | Size: 1289216 | Author: 李志强 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: This MIPS ALU verilog code-This is MIPS ALU verilog code
Platform: | Size: 3072 | Author: Kumar | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 算术逻辑单元,可以实现加法、减法、比较、移位、与门、或门等功能(arithmetic and logic unit)
Platform: | Size: 1024 | Author: 请问让人讨厌 | Hits:

[VHDL-FPGA-Verilog] [Source code] 32bit_ALU_code_verilog

Description: 32bit ALU project source code
Platform: | Size: 322560 | Author: 10bul | Hits:

[VHDL-FPGA-Verilog] lab2

Description: 算数逻辑运算单元 使用verilog编写(Arithmetic logical arithmetic units are written in Verilog)
Platform: | Size: 326656 | Author: cadetblues | Hits:

[VHDL-FPGA-Verilog] ALU

Description: this verilog code is alu. which is perform addition and sub,mul,div
Platform: | Size: 41984 | Author: munidora | Hits:

[Other] project_copy3

Description: 利用verilog实现的alu代码，可以进行加减移位等操作(Using Verilog to achieve Alu code, you can add, delete, shift and other operations)
Platform: | Size: 2048 | Author: MaybeSilent | Hits:

[VHDL-FPGA-Verilog] alu

Description: 很好用的基础alu module全集下载(Very useful basic module full set download)
Platform: | Size: 1024 | Author: nidiediheheda | Hits:
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